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  1 pi6cx201a rev. c 01/03/2012 block diagram pi6cx201a 25mhz jitter attenuator features ? pll with quartz stabilized vcxo ? optimized for 25mhz input/output frequency ? other frequencies available ? low phase jitter less than 350fs typical ? free run mode 100ppm ? single ended input and outputs ? 3.3v single supply ? lock detection ? industrial temperature: C 40c to 85c ? 20-pin tssop package description the pi6cx201a is composed of a phase-locked loop with integrated vcxo oscillator for use in the clock jitter attenuation applications. it is optimized for use with a saronix-ecera ? crystal of 25mhz, and has typical output phase jitter less than 350fs (rms). pin confguration x 1 1 lf 2 a g n d 3 s0 4 vc 5 6 7 8 free_run s1 s2 x 2 20 dgnd 19 clk_out1 18 17 a v d d 16 15 14 13 d v d d ld c lk _ o u t 2 dgnd 9 10 dvdd dgnd 12 11 fb_clk ref_clk p f d p r e d i v i d e r r e f _ c l k s0 s1 c h a r g e p u m p v c x o d i v i d e r l o c k d e t e c t o r s0 s1 l f v c l d c l k_out1 c l k_out2 f b_clk s2 s2 saronix-ecera xtal external free_run external connection required 12-0150
2 pi6cx201a rev. c 01/03/2012 pi6cx201a 25mhz jitter attenuator pin descriptions for 20-pin tssop package pin name type pin no description xi i 1 crystal input pin vc i 2 vcxo control voltage input lf i 4 loop flter pin for external loop flter connection agnd pwr 3 analog ground s0, s1, s2 i 5, 6, 7 lvcmos selection pins for internal clk_out2 divider, pins have internal pull up resistor ref_clk i 11 lvcmos input clock signal to phase detector fb_clk i 12 lvcmos feedback clock signal to phase detector dgnd pwr 9, 13, 18 digital ground dvdd pwr 10, 14 digital power clk_out2 o 15 lvcmos output clock of the internal vcxo with divider controlled by s0 and s1 ld o 16 lvcmos lock detect output, ld output is logic 0 when ref_clkx is greater than 1mhz, and phase difference be - tween ref_clkx and fb_clk is more than 2ns for 8 con - secutive clock pulses. the clock pulse frequency is equal to the crystal frequency. clk_out1 o 17 lvcmos output clock of the internal vcxo avdd pwr 19 analog power x2 o 20 crystal output pin free_run i 8 when free_run is logic low, chip is in "free run" mode. the output will remain fxed at a fxed frequency with up to a 100ppm offset from the nominal 25mhz. logic high is normal mode, with output locked to the input. internal pull-up. frequency selection table input frequency s0 s1 s2 output frequency 25mhz 1 0 1 25mhz 12.5mhz 0 0 1 25mhz 33.33mhz 0 1 1 25mhz 66.67mhz 1 1 1 25mhz 12-0150
3 pi6cx201a rev. c 01/03/2012 pi6cx201a 25mhz jitter attenuator application diagram x 1 1 v c 2 a g n d 3 lf 4 5 6 7 8 s 0 s 1 x2 18 xg n d 15 c lk _ o u t 1 14 av d d 13 12 11 17 dv d d 16 ld c lk _ o u t 2 d g n d 25 m h z (saronix-e c era g c2500065 commercial temp) c 2 c 1 r 1 s2 free_run 9 10 20 fb_clk 19 ref_clk vdd .01f vdd .01f .01f 10f dg n d dvdd vdd ferrite bead (saronix-e c era g c2500099 industrial temp) notes: 1. a feedback clock is required for lock. pin 15 can be connected to pin 12 as shown above. 2. the network r1, c1:c2 comprises the external loop flter. the loop bandwidth and jitter peaking profles are set by changing these values. please consult factory to meet your requirement. 3. the crystal and loop flter components should be placed on the same side of the board as the ic. components should be placed as close as possible to ic (within 300 mils). 4. a ground ring should enclose the loop flterr components along with pins 2 and 4. 12-0150
4 pi6cx201a rev. c 01/03/2012 pi6cx201a 25mhz jitter attenuator storage temperature ................................................ -65 to +150oc supply voltage to ground potential (v dd ) ............ -0.5 to +4.6v inputs (referenced to gnd) ............................... -0.5 to v dd +0.5v clock output (referenced to gnd).................. -0.5 to v dd +0.5v soldering temperature (max of 10 seconds) ..................... 260oc latch up ....................................................................................... 200ma esd protection (hbm) ............................................................... 2000v maximum ratings (above which the useful life may be impaired. for user guidelines, not tested) 3.3v dc electrical characteristics parameter description test conditions min. max units v dd 3.3v supply voltage 3.135 3.465 v v il input low voltage 0.8 v ih input high voltage 2 v dd + 0.3 i il input low current v in = 0v C 50 a i ih input high current v in = v dd 10 v ol output low voltage i ol = 8ma 0.4 v v oh output high voltage i ol = -8ma 2.4 v t a ambient operatin temperature -40 85 c 3.3v ac electrical characteristics parameter description test conditions min. typ max units f o output frequency cl = 15pf 25 mhz bw control voltage band width -3 db, vc=1.65v 25 khz fclk control pull range 0v vc v dd 140 ppm t idc input duty cycle measured at v dd /2 40 50 60 % t dc output duty cycle measured at v dd /2, 15pf load 45 50 55 % t r, t f rise and fall time clk_out1 measured from 0.5v to 2.5v, c l = 0pf 2 ns t r, t f rise and fall time clk_out1 measured from 0.5v to 2.5v, c l = 15pf 3 ns jp phase jitter (rms) 12khz to 5mhz 0.35 0.5 ps f free free run accuracy 100 ppm note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. tis is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. exposure to absolute maximum rating conditions for extended periods may afect reliability. 12-0150
5 pi6cx201a rev. c 01/03/2012 pi6cx201a 25mhz jitter attenuator loop filter selection table loop band width charge pump current vco gain feedback divider r1 c1 c2 100hz 32ua 2.5khz/v 1 5.1k ohm 1uf 0.1uf recommended crystal: saronix-ecera part number: GC2500065 packaging mechanicals: 20-pin tssop (l) ordering information (1-3) ordering code package code package description pi6cx201ale l 20-pin tssop, pb-free & green GC2500065 n/a commercial temperature 49s smd crystal gc2500099 n/a industrial temperature 49s smd crystal notes: 1. thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. e = pb-free and green 3. adding an x suffx = tape/reel pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com 12-0150


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